Genesys ZU: Zynq Ultrascale+ MPSoC Development Board

Description

Genesys Zu 3EG目前由于部分短缺而无法使用，并且预计直到2023年才有库存。请注册或继续检查页面以获取更新。

这数字Genesys ZU is a standalone Zynq UltraScale+ EG/EV MPSoC development board, designed to provide an ideal entry point by combining cost-effectiveness with powerful multimedia and network connectivity interfaces. There are two variants of the Genesys ZU: 3EG and 5EV. These two variants are differentiated by the MPSoC chip version and some peripherals. As compared to the 3EG, with the 5EV you get faster DDR4, more FPGA fabric, a video codec, and GTH transceivers allowing HDMI Source, Sink and 10G SFP+. Both variants support multiple multimedia and network interfaces with an excellent mix of on-board peripherals, upgrade-friendly DDR4, Mini PCIe and microSD slots, along with multi-camera and high-speed expansion connectors which are designed to support a wide range of use-cases. The Genesys ZU is primarily targeted towards Linux-based applications that facilitate access to Wi-Fi, cellular radio (WWAN), SSD, USB SuperSpeed and 4K video. Two different specialized ports, including Pmod and high-speed SYZYGY-compliant expansion module ports for our new Zmods, enable flexible expansion and easy access to a wide ecosystem of add-on modules, perfect for silicon evaluation and rapid prototyping.

Zynq Ultrascale+ 3EG设备包括在下一代连线和5G无线基础架构，云计算，AI以及航空航天和防御应用中所需的专门处理元素。5EV设备的设计考虑了高清视频，非常适合多媒体，汽车ADA，监视和其他嵌入式视觉应用。

Xilinx Zynq Ultrascale+ XCZU3EG和XCZU5EV得到了Vivado Design Suite的支持，包括免费的Vivado ML标准版（以前是Vivado WebPack™）。

Guides and demos are available to help users get started quickly with the Genesys ZU. These can be found through the支持材料标签。

Zynq Ultrascale+	XCZU3EG-SFVC784-1-E / XCZU5EV-SFVC784-1-E 256 MBIT QSPI闪存用于编程和调试的USB FTDI接口 MicroSD card interface, supporting SDR104 mode Board status and diagnostics using and on-board platform MCU 154K逻辑单元 /（256K） 7.6 Mb Block RAM (5.1 Mb) 360 DSP Slices / (1,248) 3clock management tiles / (4) DDR4，4GB，1866 MT/s（2133 MT/s），可升级的内存（Zu-5ev变体值，而不同）
Application Processor	四核ARM Cortex-A53 MPCORE最高1.5 GHz
实时处理器	Dual-core ARM Cortex-R5 MPCore up to 600 MHZ
Graphics Processor	马里^TM值-400 MP2
视频编解码器	H.264/H.265（*仅在5EV变体上）
Peripheral Connectivity	USB Type-C 3.1 GEN1双重功能设备 minipcie / msata：双插槽，半 /全尺寸 USB 2.0主机：2x Type-A
Network Connectivity	2.4GHz机上Wi-Fi 以太网1G W/ IEEE 1588 WLAN / WWAN / LORA（选项：Minipcie） SFP+ 10G Ethernet (*only on 5EV variant)
贮存	Main memory: DDR4, 4GB, 1866 MT/s (*2133 MT/s), upgradeable 104 MB/S SD SSD option: mSATA ISSI 256 Mib SNOR Flash
多媒体	1.2a双车道显示器 2 x MIPI/PCAM双车道音频编解码器 HDMI来源（仅在5EV变体上） HDMI Sink (only on 5EV variant)
扩张	1 x ZMOD端口之后SYZYGY Standard接口规范 4 x PMOD端口 1 x FMC扩展连接器 1x FMC Gigabit (*only on 5EV variant)
User I/O	4个与PL连接的LED 1个MIO连接的LED 5个PL连接按钮 2MIO-connected buttons 4个PL连接开关
产品合规性	HTC: 8471500150 ECCN：5A992

在Genesys Zu-3EG或5EV之间进行选择
12V, 8A power supply
带欧洲插头的IEC电缆
IEC cable with US plug
USB A to micro B programming cable
USB A to Type C cable
JTAG HS1 programmer and cable
的microSD卡即用Petalinux图像(loaded into the Genesys ZU's microSD card slot), with a case

To create and modify designs for your Genesys ZU, you can use Xilinx's Vivado Design Suite. Vivado is a software designed for the synthesis and analysis of HDL designs. The Genesys ZU is supported by Vivado ML Standard Edition (formerly Vivado WebPACK™).

您可以使用Xilinx的Petalinux工具在Zynq Ultrascale+上自定义，构建和部署嵌入式Linux解决方案。虽然Vitis Unified软件平台可以在异质Xilinx平台上开发嵌入式软件和加速应用程序，例如Zynq Ultrascale+。

这资源中心对于Genesys来说，Zu是董事会技术内容的中心枢纽，其中包含所有开始的东西，并减少了平均眨眼的时间。这包括参考手册和示意图以及教程，示例设计，社区项目以及我们技术支持论坛的链接。

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