Getting Started with Zynq

This guide will provide a step by step walk-through of creating a hardware design using the Vivado IP Integrator for the Zedboard.

At the end of this tutorial you will have:

• Created a simple hardware design incorporating the on board LEDs and switches.

• Created a .C project in XIlinx Vivado SDK tieing the on board LEDs and switches together using the hardware design shown in the previous step.

• Digilent's Zedboard Development Board and a Micro USB cable for UART communication and JTAG programming

• Xilinx Vivado 2015.X with the SDK package.

• Zedboard Support Files
  • These files will describeGPIOinterfaces on your board and make it easier to select your board in the initial design setup and addGPIOIP blocks in the block design
  • Follow this Wiki guideVivado Board Files for Digilent 7-Series FPGA Boardson how to install Board Support Files for Vivado 2015.X

I. Vivado

• Open Vivado and select Zedboard
• Create an new Vivado Project
• Create empty block design workspace inside the new project
• Add required IP blocks using the IP integrator tool and build Hardware Design
• Validate and save block design
• Create HDL system wrapper
• 设计合成和及其运行mentation
• Generate Bit File
• 硬件设计包括出口generated bit stream file to SDK tool
• Launch SDK

Now the Hardware design is exported to the SDK tool. The Vivado to SDK hand-off is done internally through Vivado. We will use SDK to create a Software application that will use the customized board interface data and FPGA hardware configuration by importing the hardware design information from Vivado.

II. SDK

• Create new application project and select default Hello World template
• Program FPGA and run application

When you first run Vivado this will be the main start window where you can create a new project or open a recent one.

1.1) Click onCreate New Project.



1.2) You will be presented with the project creation wizard. ClickNext.



1.3) Enter a project name and location the clickNext.



1.4) SelectRTL Projectand clickNext.



1.5) This demo does not use any existing sources, existing IP or constraints. Click through the next three screens.

1.6) SelectBoardsand select theZedboardboard file. ClickNextand thenFinish.

2.1) Once the process has completed, clickCreate Block Designin the flow navigator.



2.2) ClickOK.



2.3) A blank Block Design will open up.

3.1) Click the Add IPbutton and search for ZYNQ. Double click onZYNQ7 Processing Systemto place the bare Zynq block.



3.2) Click theRun Block Automationlink



Your Zynq block should now look like the picture below.


3.3) Click the Add IPicon again, this time search for “gpio” and add theAXIGPIOcore.

3.4) Double-click on newaxi_gpio_0core that was just added to bring up the customizing window. Under theIP Configurationtab check theEnable Dual Channelbox. ClickOK.



3.5) Add anotherGPIOcore by repeating step 3.4 but do not enable dual channel.

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4.1) The connection automation tool will add the required logic blocks for the demo. SelectRun Connection Automationhighlighted in blue.



4.2) Check the box byAll Automation. SelectGPIOunderaxi_gpio_0and selectbtns_5bitsin the Board Part Interface drop-down box.



4.3) SelectGPIO2underaxi_gpio_0and selectswts_8bitsin the drop-down box.



4.4) SelectGPIOunderaxi_gpio_1and selectleds_8bitsin the drop-down box and hitOK.

4.5) This process will add:

* The AXI interconnect * Processor System Reset * The board parts for the buttons, switches and LEDs.

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4.6) Next let's clean up our Block Design. Click theRegenerate Layoutbutton to rearrange your block design.

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5.1) Select Validate Design. This will check for design and connection errors.

5.2) After the design validation step we will proceed with creating a HDL System Wrapper. In the block design window, under theDesign Sourcestab, right-click on the block diagram file. We labeled it “design_1.bd” and selectCreate HDL Wrapper.

This will create a top module in VHDL and will allow you to generate a bitstream.

6.1) Click onGenerate Bitstreamat the bottom of the Flow Navigator. Wait for the process to complete and click OK.

7.1) Go to file→Export→Export Hardware… Make sure to check the box forInclude bitstreamthen clickOK.

8.1) Go toFile→Launch SDKand clickOK.

9.1) Go toFile→New→Application Project.



9.2) Enter the project details:

* Project name: "zedboard_getting_started_with_zynq" * Hardware Platform: design_1_wrapper_hw_platform_0 * Processor: ps7_cortexas9_0 * Languate: C * OS Platform: standalone * Board Support Package: Create New (leave default name)

9.3) The Hello World demo is a good starting point for this demo. ClickNext, selectHello Worldand clickFinish. This process will add two directories to the project explorer.

9.4) Expandzedboard_getting_started_with_zynqthen opensrcand double click on “helloworld.c”. This is the default Hello World C code.

10.1) Copy and paste the code below into the helloworld.c file.

/***************************************************** Getting Started Guide for Zedboard This demo displays the status of the switches on the LEDs and prints a message to the serial communication when a button is pressed. Terminal Settings: -Baud: 115200 -Data bits: 8 -Parity: no -Stop bits: 1 7/25/16: Created by JonP ****************************************************/#include #include "platform.h"#include #include "xparameters.h"#include "sleep.h"intmain(){XGpio输入,output;intbutton_data=0;intswitch_data=0;XGpio_Initialize(&input,XPAR_AXI_GPIO_0_DEVICE_ID);//initialize input XGpio variableXGpio_Initialize(&output,XPAR_AXI_GPIO_1_DEVICE_ID);//initialize output XGpio variableXGpio_SetDataDirection(&input,1,0xF);//set first channel tristate buffer to inputXGpio_SetDataDirection(&input,2,0xF);//set second channel tristate buffer to inputXGpio_SetDataDirection(&output,1,0x0);//set first channel tristate buffer to outputinit_platform();while(1){switch_data=XGpio_DiscreteRead(&input,2);//get switch dataXGpio_DiscreteWrite(&output,1,switch_data);//write switch data to the LEDsbutton_data=XGpio_DiscreteRead(&input,1);//get button data//print message dependent on whether one or more buttons are pressedif(button_data==0b00000){}//do nothingelseif(button_data==0b00001)xil_printf("button 0 pressed\n\r");elseif(button_data==0b00010)xil_printf("button 1 pressed\n\r");elseif(button_data==0b00100)xil_printf("button 2 pressed\n\r");elseif(button_data==0b01000)xil_printf("button 3 pressed\n\r");elseif(button_data==0b10000)xil_printf("button 4 pressed\n\r");elsexil_printf("multiple buttons pressed\n\r");usleep(200000);//delay}cleanup_platform();return0;}

11.1) Make sure that the Zedboard is connected to the host PC via theUARTUSB Port and that JP5 is set to JTAG. To program the FPGA, on the top toolbar, click the Program FPGAbutton.

11.2) Save the project. The project will automatically build.

11.3) Right click thezedboard_getting_started_with_zynqdirectory and select run as → Launch on Hardware(System Debugger).

11.4) The demo will be running on the Zedboard. Try playing around with the 4 switches (labeled SW0-SW3). Doing so should light its respectiveLED. Also over the serial port, pressing each button (labeled BTN0-BTN3) will produce the message “button x pressed”.

11.5) Tera Term or any serial terminal will work as a Console for displaying the output of the BTN's.

Set up the terminal as: