Vivado Version 2015.1 and Later Board File Installation (Legacy)
For the most up to date version of this guide, please visitInstalling Vivado, Vitis, and Digilent Board Files.
Board Files:Download
Description
This guide will help you obtain Vivado Board Files for the Nexys 4, Nexys 4 DDR, Basys 3, Arty, Nexys Video, Zedboard and Zybo FPGA Boards.
What you need before proceeding with this guide
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Xilinx Vivado 2015.1 or later.
Follow this Wiki guide on how to install and activate Vivado on your PC.Installing Vivado
What are Board Files and why do you need them
After installing Vivado, the default installation directory on your drive will contain a folder calledboard_files. If Vivado is installed in the C drive ( usually recommended ), then theboard_filesfolder can be found here:C:\Xilinx\Vivado\2015.1\data\boards.
By default this folder contains XML files for different FPGA boards manufactured by Xilinx.
XML files define different interfaces on the board. Interfaces such as Slide Switches, Push Buttons, LEDs, USB-UART, DDR Memory, Ethernet etc.
Digilent has created XML files for the Artix 7 FPGA boards:
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Basys 3
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Nexys 4
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Nexys 4 DDR
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Arty
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Nexys Video
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Zybo
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Zedboard
在阿喜GPIOIP customization window, you will be able to assign different interfaces that are available on your selected board to a specificGPIOIP block.
Installation
Download and extract this Zip file:https://github.com/Digilent/vivado-boards/archive/master.zip
You can also check out the repository for the board files on github locatedhere
This zip file will contain a folder callednew/board_files. Save this in your user documents folder. We will copy thisboard_filesfolder, navigate to theboard_filesfolder inside the Vivado Installation directory, and merge them both.
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Copy the contents of theboard_filesfolder
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Navigate to theboard_filesfolder in the Vivado Installation directory (C:\Xilinx\Vivado\2015.1\data\boards\board_files)
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Paste the contents into the board_files folder
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Restart Vivado
The newly added files will each contain a sub-folder for the current board revision. This sub-folder contains the respective XML files for each FPGA board.
The sub-folder for thenexys4_ddrwill contain an additional file calledmig.prjwhich is the Xilinx Memory Interface Generator description file for customizing the DDR2 component on theNexys 4 DDR.
You are now ready to start a new IP Integrator based Vivado project for the Digilent Nexys 4, Nexys 4 DDR, Zybo, Zedboard and Basys 3 FPGA Boards.
When using the Zedboard make sure to select the board file made by Digilent.