Getting Started with FPGA

该项目设置了您的FPGA板供使用，并向您显示启动项目文件的步骤。它还为您提供了有关电气工程和数字电路的一些基本背景知识。这是一个起动项目，与您的董事会几乎没有动手合作，但是如果您忘记了如何启动项目，这是一个很好的参考。

• Have a Digilent® FPGA board.
• 拥有一台具有互联网访问的PC。
• 有一些时间来设置董事会并下载用于进一步项目的工具。

• Xilinx ISE WebPACK。
• Adept 2

• Xilinx ISE compatible board such asNexys 4,Nexys 3,Nexys 2, orBasys 2

The use of the word circuit in this context comes from the idea that electric power must flow from the positive terminal of a power source through one or more electronic devices and back to the negative terminal of a power source, thereby forming a circuit. If the connections between an electronic device and either the positive or negative terminals of a power supply are interrupted, the circuit will be broken and the device will not function.

数字电路由电源，设备和传导网组成。一些网络提供来自“外界”的电路输入；在示意图中，通常显示这些输入网，进入组件和/或整个电路的左侧。其他网呈现到外界的电路输出；这些网通常显示出右侧的示意图。电路组件显示为任意形状，网显示为行，输入和输出用连接器符号表示。

In a digital circuit, power supply voltage levels are constrained to two distinct values – “logic high voltage” (called LHV or Vdd) and “logic low voltage” (called LLV orGND). TheGND任何电路中的节点都是测量所有其他电压的通用参考电压（在现代数字电路中，GND通常是电路中最低电压）。在示意图中，通常很难显示连接所有连接的行GNDnodes; rather, any nodes labeledGND假定将连接到相同的节点。数字电路中的VDD节点通常是最高的电压，并且所有标记为VDD的节点均绑定到同一节点。VDD可能被认为是电路中正电荷的“来源”，并且GNDmay be thought of as the “source” of negative charges in a circuit. In modern digital systems, Vdd andGND在1到5伏的任何地方分开。较旧的或廉价的电路通常使用5伏，而新电路使用1-3伏。

In digital circuits, the Vdd andGNDvoltages are used not only to supply electric power to circuit devices; they are used to represent information as well. The most basic digital devices are called gates. The function of gates, or“gating,” is to allow or halt the flow of digital information. In general, a gate has one or more inputs and produces an output (more on that later).

现在，您对什么是数字工程以及电路的功能有了基本的了解，让我们继续设置FPGA板并入门。

您需要将计算机连接到Internet，并在此步骤中进行一些时间。

1. Follow the link to install Xilinx ISE WebPACK tools, all projects require a Xilinx ISE Design Suite WebPACK Edition.

This set of steps is for you to get familiar with how to create a project. Once you can create the module for a Verilog project you will have completed this project.

从下面的链接中选择您的板，然后下载您所需的该项目的文件：

Nexys 4Nexys 3Nexys 2-500Nexys 2-1200Basys 2

1. Open the “ISE project navigator”
2. Click on File and then New Project. This will open the new project wizard.
3.在第一页：

• 为项目输入一个名称,在这种情况下项目0.
• NOTE: it is recommended that the path of location and working directory does not contain white spaces (i.e., C:\Document and Settings\… is not recommended as there are spaces in the path. Having white spaces in the file path may cause XST to fail.)

4. In the project settings, you will need to select details that pertain to your FPGA on the board. The Nexys 3 is being used for this example.

• For Nexys 4:
  • 家庭：Artix-7
  • 设备：XC7A100T
  • Package: CSG324
  • Speed: -1
• 对于Nexys 3：
  • 家庭：斯巴达6
  • Device: XC6SLX16
  • Package: CSG324
  • Speed: -2
• 对于Nexys 2-1200：
  • Family: Spartan-3E
  • Device: XC3S1600E
  • 软件包：FG320
  • Speed: -4
• For Nexys 2-500:
  • Family: Spartan-3E
  • 设备：XC3S500E
  • 软件包：FG320
  • Speed: -4
• For Basys 2:
  • Family: Spartan-3E
  • 设备：XC3S100E
  • Package: CP132
  • Speed: -4

5.向导的最后一页显示了项目摘要。查看项目的详细信息后，请单击完成。
6.向导完成后，您将留下一个空白窗口，类似于下面的图像：
7.右键单击董事会芯片的名称，然后选择“添加源的副本”选项
8. After adding the “ project0_demo.v” file to the project, add the .ucf file from the directory to the project using the instructions from the previous step. You can examine both the Verilog file (file.v) and the UCF file (.ucf) by double-clicking the file in the design window in the left pane.
9. Now that you have the Verilog file and the appropriate UCF file added to the project, you can build the project by double-clicking on “generate programming file”.
10. Once the project is done building the bit file, the window will look like this:
11. Now that we have a bit file generated from the Xilinx tools, it's time to program with Adept!

1. If you have not already installed Digilent Adept System, then please go here to do so: Digilent Adept
2. Once installed, open the Adept program and the software will automatically recognize your board. A Nexys3 is being used for this demonstration, but note that the window will say the name of whichever FPGA you are using.
3.现在，您将使用步骤2的“ BIT文件”编程，以进行此单击“浏览”，然后导航到您选择的工作目录，然后选择.bit文件。
4. Click on program and your board will be programmed. You will see the demo operating and showing the green LEDs on except for a moving off引领。七个片段显示将通过不同的段变化。完成此完成后，您已经完成了这个项目！