Getting Started with Zynq Servers

This guide will provide a step by step walk-through of creating a Zynq based hardware design using the Vivado IP Integrator that will build over theGetting Started with Zynqguide by making use of the on-board Ethernet port and GPIOs for the Zybo FPGA board.

At the end of this tutorial you will have a comprehensive hardware design for Zybo that makes use of various Hardware ports on the Zybo which are managed by the Zynq Softcore Processor block.

• Digilent's Zybo Development Board and a Micro USB cable for UART communication and JTAG programming

• Xilinx Vivado 2015.X with the SDK package.

• Zybo Support Files
  • These files will describeGPIOinterfaces on your board and make it easier to select your board in the initial design setup and addGPIOIP blocks in the block design
  • Follow this Wiki guideVivado Board Files for Digilent 7-Series FPGA Boardson how to install Board Support Files for Vivado 2015.X

I. Vivado

• Open Vivado and select Zybo board
• Create an new Vivado Project
• Create empty block design workspace inside the new project
• Add required IP blocks using the IP integrator tool and build Hardware Design
• Validate and save block design
• Create HDL system wrapper
• Run design Synthesis and Implementation
• Generate Bit File
• 硬件设计包括出口generated bit stream file to SDK tool
• Launch SDK

Now the Hardware design is exported to the SDK tool. The Vivado to SDK hand-off is done internally through Vivado. We will use SDK to create a Software application that will use the customized board interface data and FPGA hardware configuration by importing the hardware design information from Vivado.

II. SDK

• Create new application project and select default Hello World template
• Program FPGA and run application

When you first run Vivado this will be the main start window where you can create a new project or open a recent one.

1.1) Click onCreate New Project.

1.2) You will be presented with the project creation wizard. ClickNext.

1.3) Enter a project name and location the clickNext.

1.4) SelectRTL Projectand clickNext.

1.5) This demo does not use any existing sources, existing IP or constraints. Click through the next three screens.

1.6)选择Boardsand select theZyboboard file. ClickNextand thenFinish.

2.1) Once the process has completed, clickCreate Block Designin the flow navigator.

2.2) ClickOK.

2.3) A blank Block Design will open up.

3.1) Click the Add IPbutton and search for ZYNQ. Double click onZYNQ7 Processing Systemto place the bare Zynq block.

3.2) The connection automation tool will add the required logic blocks for the demo. SelectRun Block Automationhighlighted in blue.

3.3) Click theRun Block Automationlink



3.4) Connect FCLK_CLK0 to M_AXI_GP0_ACLK

Your Zynq block should now look like the picture below.

4.1) Select Validate Design. This will check for design and connection errors.

4.2) After the design validation step we will proceed with creating a HDL System Wrapper. In the block design window, under theDesign Sourcestab, right-click on the block diagram file. We labeled it “design_1.bd” and selectCreate HDL Wrapper.

This will create a top module in VHDL and will allow you to generate a bitstream.

5.1) Click onGenerate Bitstreamat the bottom of the Flow Navigator. Wait for the process to complete and click OK.

6.1) Go to file→Export→Export Hardware… Make sure to check the box forInclude bitstreamthen clickOK.

7.1) Go toFile→Launch SDKand clickOK.

8.1) Go toFile→New→Application Projectin the main toolbar. A new project window will pop up. Give your SDK project a name that has no empty spaces as shown below. Make sure theTarget Hardwareis the correct hardware design. In our case, it will bedesign_1_wrapper_hw_platform_0.

If for example, you also have another hardware design in theProject Explorerwindow, then you will also see this design name in the Target Hardware drop down selection list.

Since we only have one hardware designdesign_1_wrapper_hw_platform_0this will be our target hardware. SelectCreate NewunderBoard Support Package. The tool will automatically populate theBoard Support Packagename to match with the give project name. ClickNext.

8.2) SelectIwIP Echo Serverunder the list of available templates and clickFinish.

8.3) After completing the previous step, you will see two new folders in theProject Explorerpanel.echowhich contains all the binaries, .c and .h (Header) files, andecho_bspwhich is the board support folder.echois our main working source folder. This also contains an important file shown here in the src folder calledlscript.ld. This is a Xilinx auto generated linker script file.

8.4) Next expand the echo_bsp click on system.mss and select “modify this BSP's Settings”

8.5) Next select lwip141 and expand temac_adapter_options. Then in the phy_linkspeed parameter select 1000 Mbps(CONFIG_LINKSPEED1000), click ok.

9.1) Make sure that the Zybo is turned on and connected to the host PC via micro USB cable. On the main toolbar, clickXilinx工具→Program FPGA
Make sure that theHardware Platformis selected asdesign_1_wrapper_hw_platform_0.

In the software configuration box, underELF File to Initialize in BlockRAM

Now click on Program.

You can use the SDK concsole or other serial terminal. I typically use Tera Term. Refer to this linkhttp://en.wikipedia.org/wiki/Tera_Termto know what Tera Term is. You can download and install Tera Term from this linkhttp://ttssh2.sourceforge.jp/index.html.en

10.1) Before establishing a serial connection with Tera Term, make sure that in SDK, theConnect STDIObox under theSTDIO Connectiontab inRun Configurations没有启用。

Establish a serial connection with the correct communication port inside Tera Term.

Tera Term will work as a Console by displaying the output.

The serial setup is as shown below.

right click on echo and select Launch on hardware(system debugger)

11.1) In the console window at the bottom of the screen the details of the connection will be displayed.

12.1) Connect your PC to your Zybo using an Ethernet cable.If using a router, watch the UART console to find out the IP of the Zybo echo server, and connect to that IP address. Setting up the connection as static is unnecessary.

12.2) In order to connect to the echo server directly from your computer, you must set up your Ethernet connection with a static IP address. To do this:

12.2.1) Right click your internet connection and clickOpen Network and Sharing Center.

12.2.2) Find the Ethernet Connection to your Zybo. It should be an unidentified network. ClickEthernet.

12.2.3) ClickProperties.

12.2.4) SelectInternet Protocol Version 4 (TCP/IPv4)and clickProperties.

12.2.5) Click theUse the following IP address:bullet and type in an IP address “192.168.1.XX”, where XX is a value between 2 and 255, but not 10.This IP must not be the same as another already on your network. Make sure to click within theSubnet maskfield to get the 255.255.255.0 mask to autofill. ClickOkand you will have a static IP address.

12.3) Open Tera Term and type in the following info and clickOk.

12.4) Type anything into the console and press your keyboard's Enter key. The echo server will echo back your input and display it in the console.

You can go to Setup→Terminal and change the settings below for a more traditional echo server format

Remember to go back intoOpen Network and Sharing Center

SelectInternet Protocol Version 4 (TCP/IPv4)and clickProperties.

Selectobtain an IP address automatically